EDN

C-based coprocessor design, part 2: Datapath customization

A unique aspect of the LE2 is its ability to adapt to various workloads through the use of C-designed plug-in vector datapaths. This section elaborates on the design of a custom vector ISA for ...
Electronic Design

Integrated Physical Datapath Technology Delivers Predictable QOR, Reduces TTM and Enables Reuse

Integrated physical datapath technology based on structured placement, optimization and routing helps achieve predictable quality of results (QoR) and meet tight design schedules. High-performance ...
EDN

Arithmatica offers FPU design and datapath synthesis tools

Expanding beyond its current offerings of silicon-algorithm IP and design services for datapath intensive IC design projects, Arithmatica this week will officially become an EDA tool vendor when it ...
Design-Reuse

Bluespec Delivers Plug-and-Play Library for Algorithm and Datapath Design

Waltham, Mass. – February 9, 2010 - Bluespec Inc. today announced its Pipelined Architecture Composers library (PAClib), the industry’s first parameterized, plug-and-play building block library ...
Design-Reuse

Arithmatica's Datapath Synthesis Used by Solarflare Communications for New 10GBASE-T PHY Design

SAN JOSE, Calif. - June 3, 2008 - Arithmatica, Ltd. today announced that Solarflare Communications, Inc. has successfully deployed Arithmatica’s datapath synthesis tool, CellMath Designer™, to ...
Semiconductor Engineering

RTL Optimization Via Verified E-Graph Rewriting (Intel, Imperial College London)

A technical paper titled “ROVER: RTL Optimization via Verified E-Graph Rewriting” was published by researchers at Intel Corporation and Imperial College London. “Manual RTL design and optimization ...