Design-Reuse

Adding Cache to IPs and SoCs

• Cache memory significantly reduces time and power consumption for memory access in systems-on-chip. • Technologies like AMBA protocols facilitate cache coherence and efficient data management ...
Semiconductor Engineering

A review of interconnect materials used in emerging memory device packaging: first- and second-level interconnect materials

“The main motivation of this review is to study the evolution of first and second level of interconnect materials used in memory device semiconductor packaging. Evolutions of bonding wires from gold ...
Design-Reuse

A Re-Usable Level 2 Cache Architecture

This paper presents the architecture of a high performance level 2 cache capable of use with a large class of embedded RISC cpu cores. The cache has a number of novel features including advanced ...