EDN

Designing dual-modulus dividers in an FPGA

It is often necessary for designers to implement a digital clock divider where the output frequency is not an integer factor of the reference clock. Today's newer FPGA technologies usually contain ...
EDN

Simple logic circuit doubles input frequency

The versatile phase-locked loop (PLL) allows multiplication of a reference frequency with an operating frequency that ranges from “DC to daylight.” A PLL is overkill for some applications, however, ...
Electronic Design

What Do Clocks, Carriers, Local Oscillators, and FM Have in Common?

The master timing control circuit for most electronic applications is a precision signal source. For digital applications, it’s an accurate clock. In RF applications, it’s a carrier source for a ...
Design-Reuse

40 GHz VCO and Frequency Divider in 28 nm FD-SOI CMOS Technology for Automotive Radar Sensors

1 STMicroelectronics, 95121 Catania, Italy; giorgio.maiellaro@st.com (G.M.); giovanni.caruso@st.com (G.C.); salvo.scaccianoce@st.com (S.S.) 2 STMicroelectronics ...
Electronic Design

High-Reliability Frequency Dividers Cover Wide Frequency Bands

Pasternack recently launched a new line of frequency-divider modules that cover broadband frequencies ranging from 0.1 to 20 GHz. A selection of 28 different models is offered with a variety of fixed ...
The Engineer

Revolution and Evolution in Frequency Synthesis: How PLL/VCO Technology Has Increased Performance, Decreased Size, and Simplified Design Cycle

Microwave frequency generation has posed significant challenges to engineers over the years, requiring in-depth knowledge of analog, digital, and radio frequency (RF) and microwave ...