AMITYVILLE, N.Y. – Speco Technologies has just announced a strategic partnership with JVSG to enhance design system software capabilities with a new IP-system design tool. The partnership combines ...

The search for productivity inSOC (system-on-chip) designis a search for balancebetween abstraction and automation.Greater abstractionat a step in the designflow means fewer design elementsto process.

AMITYVILLE, N.Y. – Speco Technologies has just announced a strategic partnership with JVSG to enhance design system software capabilities with a new IP-system design tool. The partnership combines ...

How IP-XACT enables tool interoperability, multi-level abstraction, and accurate hardware/software interface alignment through structured metadata. Why integration automation is critical as complexity ...

Altera Corporation (Nasdaq: ALTR) today announced the release of its Quartus® II software version 11.0, the industry’s number one software in performance and productivity for CPLD, FPGA and HardCopy® ...

SAN JOSE, Calif.--(BUSINESS WIRE)--Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced the delivery of the Cadence ® Cerebrus™ Intelligent Chip Explorer, a new machine learning (ML)-based tool ...

At each new process node, gates are free. That opens the door to a lot more IP blocks, and a lot of new challenges. Driven by each successive generation of semiconductor manufacturing technology, ...

In today’s complex system-on-chip (SoC) design flows, intellectual property (IP) blocks are everywhere—licensed from third parties, leveraged from internal libraries, or hand-crafted by expert teams.

There are a number of system design factors requiring consideration when implementing an FPGA processor. Some of those factors include the use of co-design, processor architectural implementation, ...

French semiconductor IP vendor Dolphin Semiconductor said its collaboration with HCLTech reflects growing demand for pre-optimized, platform-based system-on-chip development, as energy costs, ...