EDN

Building a better memory controller: architectural performance exploration of an AXI memory controller

Communicationbetween processors and memories is often a major bottleneck, making the designof the memory controller a critical task in determining overall system-levelperformance. The memory ...
TechAnnouncer

Understanding Chipset Architecture: From Northbridge to Modern Designs

Chipset architecture used to be split into two main chips: the Northbridge for fast stuff like the CPU and RAM, and the ...
TweakTown

China's Innosilicon LPDDR6/5X memory controller IP delivered to first customers, up to 14.4Gbps

Chinese chip maker Innosilicon has announced its new LPDDR6/5X memory controller IP provided to its first customers in China, ...
TechSpot

Which Intel CPU architecture was the first to integrate the memory controller instead of using the motherboard's northbridge?

Windows Millennium Edition (ME) shipped with all of these features, except... Although many microprocessors such as IBM's POWER5 and AMD's Athlon 64 already had built-in memory controllers, Intel ...
EDN

Embedded Systems Architecture, Device Drivers – Part 2: Memory device drivers

Editor's Note: Embedded Systems Architecture, 2nd Edition, is a practical and technical guide to understanding the components that make up an embedded system’s architecture. Offering detailed ...
Semiconductor Engineering

Inside The Hybrid Memory Cube

The memory bandwidth requirements for today’s high-performance computing applications and next-generation networking applications have increased beyond what conventional memory architectures can ...
Ars Technica

Intel launches all-new PC architecture with Core i5/i7 CPUs

Intel brought its mainstream desktop CPU lineup into the Nehalem era today with the launch of the Core i7 860 and 870, and the Core i5 750. Also launched today is the P55 chipset, which implements a ...
HotHardware

OCZ Intros Second-Gen Virtualized Controller Architecture

Average consumers may see OCZ Technology for little more than their solid state drives, PSUs and memory modules. But the company's actually got some really sophisticated stuff going on in the backroom ...
Semiconductor Engineering

Setting The Memory Controller Free From Managing DRAM Maintenance Ops (ETH Zurich)

A new technical paper titled “A Case for Self-Managing DRAM Chips: Improving Performance, Efficiency, Reliability, and Security via Autonomous in-DRAM Maintenance Operations” was published by ...
insideHPC

Astera Labs Says Its CXL Memory Controller Boosts Server Memory Bandwidth by 50%

SANTA CLARA, CA, U.S. – September 19, 2023 – Astera Labs today said its Leo Memory Connectivity Platform is the industry’s first Compute Express Link (CXL) memory controller that increases server ...
Electronic Design

Memory Architecture Aims At High-End Mobiles

Infineon has expanded its wireless memory portfolio with CellularRAM, this is a customised memory solution designed and tailored for mid-range to high-end mobile phone applications. CellularRAM is ...