GenieTM-PCIe is a system verilog implementation of the PCI Express (PCIE) standards. It is designed to be a Verification IP and an architecture model to facilitate ASIC designs with a PCIE interface.

HILLSBORO, OR, Nov 02, 2010 -- Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced the immediate availability of the PCI Express Root Complex (RC) Lite solution based on the ...

Lattice Semiconductor today announced the immediate availability of the PCI Express Root Complex (RC) Lite solution based on the LatticeECP3 and LatticeECP2M FPGA families for use in simple bridging ...

Today's 90 nm FPGAs offer high performance and cost effective platforms to implement single-chip and two-chip PCI Express solutions, making them the ideal platforms for PCI Express. By Abhijit ...

In addition to accommodating longer data-transmission distances, the XIO2000 PCI Express-to-PCI bridge promotes seamless interfacing of legacy PCI devices to the PCI Express bus. The device provides a ...

There were reports circulating that the upcoming Intel core i7 Haswell-E HEDT processors would feature more PCI-E express lanes, but it looks like the opposite is true. It was hoped that the chip ...

Things would go a whole lot better for server designs if we had a two year or better still a four year moratorium on adding faster compute engines to machines. That way, we could let memory subsystems ...

With a three year cadence between PCI-Express bandwidth increases and a three year span between when a gear shift is first talked about and when its chippery is first put into the field, it is ...

DESIGN VIEW is the summary of the complete DESIGN SOLUTION contributed article, which begins on Page 2. Current parallel backplane technologies are rapidly being replaced with advanced ...