Bill Gates-backed startup aims to revive Moore's Law with optical transistors

Neurophos is developing a massive optical systolic array clocked at 56GHz good for 470 petaFLOPS of FP4 compute As Moore's ...
Nanowerk

Stacked memristor arrays compute Euclidean distance in memory to accelerate self-organizing maps

A novel stacked memristor architecture performs Euclidean distance calculations directly within memory, enabling ...
Le Lézard

MicroCloud Hologram Inc. Utilizes FPGA to Accelerate Tensor Network Computing to Achieve Quantum Spin Models

MicroCloud Hologram Inc. , ("HOLO" or the "Company"), a technology service provider, proposed an innovative hardware ...
GitHub

KAMI: Communication-Avoiding General Matrix Multiplication within a Single GPU

This repository contains the artifact for the SC '25 paper submission "KAMI: Communication-Avoiding General Matrix Multiplication within a Single GPU." The NVIDIA GH200 is installed with Ubuntu 22.04 ...
IEEE

MH-SpGEMM: Efficient Sparse General Matrix-Matrix Multiplication on Modern GPUs via Masking and Hashing Cooperative Optimization

Abstract: Sparse General Matrix-Matrix Multiplication (SpGEMM) is a core operation in high-performance computing applications such as algebraic multigrid solvers, machine learning, and graph ...
IEEE

Evolutionary Multiobjective T-Matrix Assisted Pin Map Optimization for Ball Grid Array Design

Abstract: With the increasing operating frequency and integration density of ball grid array (BGA) packaging in high-performance systems, radiation leakage, and signal interference from solder balls ...