EDN

Low power implementation techniques for ASIC physical design

In the semiconductor domain, the operating frequency of devices and the number of transistors in a single module increase over time. In this article, we will look at widely known low power ...
Electronic Design

Safeguarding low-level signals

Accurately measuring very low-level signals requires more than just good instrumentation. Special care is needed throughout the measurement system because the very ...
Semiconductor Engineering

New Approaches To Low Power Design

There is work to be done in energy-efficient architectures, power modeling and near-threshold computing, but there are many more options available today. While Moore’s Law continues to drive feature ...
Electronic Design

Keithley Unveils 7th Edition Of Low Level Measurements Handbook

Keithley Instruments, Inc. has published its seventh edition of the Low Level Measurements Handbook: Precision DC Current, Voltage, and Resistance Measurements. This 250-page paperback reference, ...
Semiconductor Engineering

Writing Reusable UPF For RTL And Gate-Level Low Power Verification

The Unified Power Format (UPF) is used to specify the power intent of a design. Once written, the UPF file is applied at every stage of the design cycle — starting with the RTL, then the gate-level, ...